Chiplet-Guard: Proactive Threat Detection for Efficient and Interoperable Chiplet Security

Chiplet-Guard is a pioneering research initiative addressing the security challenges of chiplet-based computing architectures. As the demand for high performance and energy efficiency grows, traditional monolithic System-on-Chip (SoC) designs face physical and economic limitations. Chiplets, which consist of multiple dies integrated on a single substrate, offer a scalable solution by allowing different process technologies to be used for different components. This new architecture is being rapidly adopted by the industry, with standards like Universal Chiplet Interconnect Express (UCIe) enabling interoperability among various vendors. However, the modular and heterogeneous nature of chiplet-based systems introduces new security vulnerabilities and attack surfaces, necessitating a proactive approach to security.
The Challenge:
Current security paradigms and malware detection methods, primarily designed for monolithic chips, are inadequate for chiplet-based systems. These systems are vulnerable to complex attacks that exploit their modular nature, such as malware offloading and cross-component threats that evade traditional detection mechanisms. Existing hardware-based malware detectors (HMDs) typically monitor a single component, like the CPU, leaving other parts of the system exposed. There is a critical need for a holistic security framework capable of detecting and responding to threats across the entire chiplet ecosystem.
Aims and Objectives:
Chiplet-Guard aims to develop a comprehensive security framework specifically tailored for chiplet-based architectures. The project has four main objectives:

New Malware Threats in Chiplets: Identify and characterize the new types of malware threats unique to chiplet systems, focusing on how these threats exploit the heterogeneity and complexity of these architectures.
AI-based Global System Security Monitoring (AI-GSM): Develop a global, robust AI-driven security monitoring system that integrates data from all chiplets to...